Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins's Analog-Baseband Architectures And Circuits For Multistandard PDF

By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

ISBN-10: 1402064322

ISBN-13: 9781402064326

ISBN-10: 1402064330

ISBN-13: 9781402064333

With the earlier few decade efforts on lithography and integrated-circuit (IC) applied sciences, very inexpensive microsystems were effectively constructed for lots of varied functions. the rage in instant communications is towards making a networkubiquitous period within the future years. Many extraordinary possibilities and demanding situations, equivalent to layout for multi-standardability and low-voltage (LV) compliance, are swiftly changing into the mainstream instructions in wireless-IC learn and improvement, provided that the previous can supply the easiest connectivity between various networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for extra expense and tool aid.

Analog-Baseband Architecturees and Circuits presents architectural and circuit suggestions for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the ebook studies the actual layer requirements of recent instant conversation criteria, provides the elemental tradeoffs taken with transceiver structure choice, and gives case reports of the cutting-edge multistandard transceivers, the place the main concepts bolstered are highlighted and mentioned. A statistical precis (with a hundred+ references mentioned) of such a lot used transmitter and receiver architectures for contemporary verbal exchange criteria is equipped. the entire references are citied from the prime boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The moment half specializes in the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection procedure is disclosed. It, in the course of the reconfiguration of receiver and transmitter analog basebands, allows not just a leisure of the RF frequency synthesizer’s and native oscillator’s layout requisites, but in addition an effective multistandard compliance by means of synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the main is verified in few layout examples. one among them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but in addition encompasses a flexible-IF topology, a distinct 3D-stack floorplan, and a selected layout technique for prime testability and routability.

The 3rd half offers with the circuit layout. as well as the methodical description of many LV circuit options, three tailormade LV-robust practical blocks are awarded. They contain: 1) a double-quadrature-downconversion clear out (DQDF) – it realizes at the same time clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it bargains a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon region required for understanding a wide time consistent on chip whereas maximizing its highpass-pole switchability for speedy dc-offset transient.

The final half offers experimental result of the three tailored construction blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS technique. formerly untold on-/off-chip co-setup for either full-chip and construction blocks measurements are defined. not just the development blocks have effectively prolonged the cutting-edge boundary when it comes to sign bandwidth and provide voltage, the analog-baseband IC has been to this point the lowest-voltage-reported resolution for IEEE 802.11a/b/g WLAN receivers.

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Summary of different RX architectures RX Architecture Advantages Disadvantages Superheterodyne + Reliable performance + Flexible frequency plan + No DC offset and 1/f noise Image-Rejection (Hartley and Weaver) + Low cost + No DC offset and 1/f noise + High integratability – Expensive and bulky, high power – Difficult to share the SAW filters for multistandard – Quadrature RF-to-BB downconversion – Suffer from first and secondary images – Narrowband (Hartley) – High I/Q matching Zero-IF Low-IF 3.

93–94, Feb. 2002. 68] H. 8-V Operation RFCMOS Transceiver for Bluetooth,” IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp. 230–233, June 2002. 69] C. , “A 43mW Bluetooth Transceiver with –91dBm Sensitivity,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 90–91, Feb. 2003. 70] H. 5MHz IF and Direct Modulation Transmitter,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 94–95, Feb. 2003.

200 kHz and 5 MHz), in order to maintain a high reference frequency, the fractional-N PLL structure is more appropriate than its integer-N counterpart. Beside, TDMA standards allow the baseband building circuitry to be shared between TX and RX paths. A complex/real filter with tunable center-frequency and band-width can serve both low-IF/zero-IF reception and two-step-up/direct-up transmission. The bandwidth of the employed operational amplifier should be able to scale with the channel’s bandwidth to save power.

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Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers by Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

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